Adaptive Memory-Enhanced Time Delay Reservoir and its Memristive Implementation

Time Delay Reservoir (TDR) is a hardware-friendly machine learning approach from two perspectives. First, it can prevent the connection overhead of neural networks with increasing neurons. Second, through its dynamic system representation, TDR also be implemented in hardware by different systems. However, performs poorly on tasks that involve long-term dependency. In this work, we first introduce higher-order delay unit, which capable accumulating and transferring long history states an adaptive manner to further enhance reservoir memory. Particle Swarm Optimisation applied optimize enhanced degree memory adaptivity. Our experiments demonstrate superiority both for short- datasets over seven existing approaches. light feature TDR, propose memristive implementation our memory-enhanced where memristor memristor-based element are construct reservoir. Through circuit simulation, feasibility proposed verified. The comparisons reservoirs show effective datasets, while exhibiting benefits terms smaller area lower power consumption compared traditional reservoirs.